Marvell demos 2nm optical interconnects for AI racks

At a glance

Marvell has demonstrated the first optical interconnects built on a 2nm process: 400G-per-lane optical PAM4, a live 800G ZR/ZR+ pluggable with MACsec, and 1.6T coherent and coherent-lite links. The work targets the 3.2T generation of AI data centre networks, where bandwidth density and power per bit decide how much computing a building can hold. Marvell is showing 38 demonstrations at ECOC 2026 in Málaga, including a 102.4T co-packaged optics platform, but none of it is on sale yet.

What Marvell put on the bench

The company announced the demonstrations on 21 September, the second day of ECOC 2026, which runs in Málaga until 24 September. Three of them are billed as firsts. The 400G-per-lane optical PAM4 demo is the newest step in a PAM4 line Marvell has been building for years, and it is pitched squarely at the move to 3.2T connectivity. The 800G ZR/ZR+ pluggable is the first live 2nm demonstration of that format with media access control security on board, running on the company's Libra 2nm coherent DSP and extending the COLORZ family of pluggable modules. The third is a pair of 1.6T links, one coherent ZR and one coherent-lite in the O-band, both driven by DSPs Marvell announced earlier this year.

Alongside the interconnects, Marvell is showing a co-packaged optics platform running at 102.4 Tbps with 200G-per-lane silicon photonics. Co-packaged optics moves the optical engine next to the accelerator or switch die instead of leaving it at the end of a cable run, which is what makes the approach interesting at rack scale. Marvell says 38 advanced demonstrations are on its booth in total, some of them built with partners, and it is running executive presentations and a fireside chat on emerging optical technology during the week.

Why the process node is the story

Optical interconnect has become the part of AI infrastructure that decides how large a cluster can get. Compute is no longer the only constraint: shifting data between accelerators, between racks and between buildings now consumes power that operators would rather spend on arithmetic, and shrinking the DSP that drives the light is one of the few levers that improves bandwidth density and power per bit at the same time. Marvell's own history makes that concrete. It shipped 5nm 200G-per-lane 1.6T Nova DSPs in 2023, followed with the 3nm 1.6T Ara platform in 2024, and put 800G Libra DSPs on 2nm earlier this year. The company frames the 2nm generation as what the step up to 3.2T requires across scale-up, scale-out and scale-across networks.

Demos on a show floor, not silicon on order

“AI data center operators need optical interconnect technologies that deliver higher bandwidth, lower power and greater security across every part of the network,” said Xi Wang, senior vice president and general manager of Marvell's Connectivity Business Unit. That is the company's own framing, and the supporting numbers are its own too: the release carries no measured power per bit, no reach figures and no independent test data, and it attaches no price or availability date to any of the 2nm parts. Trade-show demonstrations are also a step short of silicon a customer can order. Attendees can see the work at booth 2002 this week.

Our opinion

Read past the word “first” and the question that matters is the one Marvell does not answer: joules per bit. A 2nm optical DSP is a genuine engineering result, and the company has earned some patience on process leadership after Nova, Ara and Libra, but the 3.2T generation will be settled by measured power and reach at production volumes rather than by a demonstration on a conference floor. The more revealing detail is the company's own language about scale-up, scale-out and scale-across: optics are no longer an accessory bolted onto an AI cluster, they are the thing that sets its ceiling. The vendor that proves its running cost first, rather than its lane speed, takes the 3.2T build-out.