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SK hynix is putting 100 tiny processors inside SSD controllers

SK hynix says its H-TPU design could make future enterprise SSD controllers smaller and less power-hungry as AI storage demands grow.

SK hynix engineers present memory and storage hardware at a technology exhibition

SK hynix is designing SSD controllers with more than 100 small processors to handle repetitive storage work, an approach the company says could cut power use and chip area as faster interfaces and AI workloads pile on the pressure. 1

The Hynix Transaction Processing Unit (H-TPU) architecture is intended for enterprise storage and future memory systems. Rather than asking a general-purpose processor to manage every read, write, metadata update and buffer operation, SK hynix wants smaller specialist units to take on the repetitive jobs. 1

Why SSD controllers are getting crowded

Storage controllers have to keep up with faster interfaces while handling increasingly small data requests. SK hynix says conventional CPU cores are approaching their limits in power consumption and physical area, particularly as PCIe 6.0, PCIe 7.0 and PCIe 8.0 raise the amount of data that can move through a drive. 1

The H-TPU design splits that workload. Its small processors can manage common input/output paths, while conventional cores remain responsible for more complicated work such as error recovery, exception management and storage policy decisions. The company describes the architecture as a four-stage pipeline with sequential execution, allowing only the units needed for each request to be active. 1

SK hynix says each H-TPU occupies about 4% of the area of a general-purpose CPU core and uses roughly 2.5% of its power. Those figures are company claims rather than independent performance results, and the announcement does not establish how much faster or quieter a finished SSD would be in real-world use. 1

A storage design aimed at AI workloads

The company plans to use H-TPUs in upcoming enterprise SSD controllers and its Storage Next architecture. That work is aimed at smaller transactions, including data requests of 512 bytes or less, as AI systems increasingly move information in fine-grained pieces. SK hynix also intends to extend the approach to its AIN storage portfolio and High Bandwidth Flash technology. 1

That matters because adding more conventional cores is an expensive way to deal with repetitive tasks. A specialised processor array could handle the routine traffic without making the main controller dramatically larger, although the trade-off will be more complexity in the controller design and its software. SK hynix has not said when H-TPUs will appear in specific commercial products or provided independent measurements of their effect on total SSD performance. 1

Our opinion

This is the kind of storage engineering that rarely makes a splash at the checkout, but it could become important as AI servers demand more bandwidth from every layer of the system. The appealing part of H-TPU is not the headline number of processors; it is the attempt to stop wasting large, power-hungry general-purpose cores on repetitive I/O work.

The caveat is equally important. A claimed 2.5% of the power and 4% of the area sounds impressive for each small unit, but the controller still needs a complete system around them, and there is no product benchmark yet. For now, H-TPU is a promising architecture rather than a reason to expect an immediate leap in consumer SSD performance.